The present invention relates to an arrangement for the display of processing data by means of pixels on a cathode ray tube (CRT) comprising a circuit for control of the CRT including means for horizontal and vertical deflection of the signal of the pixel on the tube to provide for scanning of the CRT and comprising a control means operable to generate a plurality of first logic signals which define the pixel to be displayed, the control means including means operable to generate at least two further logic signals which define synchronisation of the first logic signals with scanning of the tube effected by the deflection means.
In data processing equipment, the signal for control of the video display unit (VDU) is defined by a plurality of logic signals generated by the video control. In the case of a monochromatic VDU, in which the pixels are defined by a combination of signals representative of various base colours, the logic signals generally comprise the signals of such colours, a luminance control signal and a group of signals for defining, in dependence on the degree of resolution or display mode, horizontal and vertical synchronisation of deflection of the electron beam over the screen of the video.
Since the VDU is generally separate or can be separated from the data processing equipment, for example a personal computer, in the known arrangements the control for the VDU, which is disposed in the computer, is interfaced with the circuit for deflection control and control of the electron beam, which is disposed in the VDU, by means of a bus which carries in parallel mode the individual signals for defining the pixel. However such an interface is sensitive in operation and expensive to produce, especially when the VDU is connected to the computer by means of a cable of significant length.